Industrial Session 5
Description
Affiliation: ProteanTecs (IL)
Hardware-Independent ATE Software for SLT
Affiliation: Roguevation Inc. (US)
Ric has led Roguevation since its inception in 2009. He has provided the vision for unique and innovative semiconductor test software products that are deployed around the globe. Prior to forming Roguevation, Ric was co-founder of the DFT-focused ATE company Inovys and held the role of VP of Engineering. Ric began his career at Trillium (LTX) where he held positions in Support, Applications, and Marketing. Ric has a BSEET from DeVry Institute of Technology, Phoenix, AZ.
In-chip Monitoring for Extended Reliability Testing and Mission Profile Monitoring Feedback Loop
Affiliations: 1 proteanTecs (IL), 2 ELES (IT)
The reliability challenges of modern automotive and mission critical applications poses the risk that classical way of reliability testing, such as those outlined in industry standards like JEDEC JESD47 and JESD22, is insufficient. The mission profile at the base of existing standards were established decades ago and might not be representative of the requirements of modern mission-critical SoC, particularly those based on advanced FinFET nodes slated for deployment in the next generation of vehicles. To address this gap, innovative approaches are needed to guarantee the application of the adequate stress vs. mission profile, to measure performance degradation more precisely, and with fine granularity, simplifying the search for root cause analysis (RCA) and enabling an effective design for Zero Defects. This paper will explore the integration of advanced reliability test equipment, such as ELES ART5xx in combination with proteanTecs in-chip digital monitoring IP and analytics. Leveraging deep data extracted from in-chip monitors enables running more complex test sequences and checking their response on board during the oven stress time. The outcome is an efficient stress test capable of identifying and addressing design and process vulnerabilities.
Product manager and solution architect with 15+ years of professional experience in automotive development, from prototypes to mass production of powertrain applications, diagnostics, and ADAS/AD high-end scalable architecture. Andrea joined proteanTecs in 2020 to lead the design of automotive safety-compliant solutions. Before joining proteanTecs, Andrea served as the Chief Software Architect at Samsung Electronics, Product Owner at Zenuity, and Platform Project Manager at Bosch in Germany.
Virtual Test Development Using Pre-Silicon Verification Environment
Affiliation: Infineon Technologies AG (DE)
The demand for a fast time to market and competitive market entry in the semiconductor industry requires fast project execution. In an integrated circuit (IC) development project, the production test package development is very important and often one of the project’s critical paths to time-to-market. To cope with the project speed requirements and to deliver an effective production test solution, a new strategy and approach are needed. This paper describes the virtual test development (VTD) in Advantest V93k Automated Test Equipment (ATE). It uses the pre-silicon verification environment and the top-level IC design to simulate different production test cases, especially for the complex mixed-signal blocks. One of the objectives of the paper is to describe the process and relevant components for executing VTD. Using VTD, we can reduce the production test development cycle time by capturing early test program issues that otherwise can only be discovered during the real silicon trial using an ATE.
Principal Engineer in Infineon's Automotive division focusing on test methodology. Worked as a technical lead in Infineon Austria, in collaboration with multidisciplinary teams across different Infineon sites, to complete the one of the pilot products that used Virtual Test Development methodology.